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llvm source #1
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clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 20.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
hexagon-clang 16.0.5
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 20.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 20.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx" ; Function Attrs: mustprogress noinline nounwind ssp uwtable define void @_Z14inner_product2PiS_S_iii(ptr noundef %B_mem, ptr noundef %C_mem, i32 noundef %M, i32 noundef %N) #0 { entry: %div = sdiv i32 %M, 16 %div1 = sdiv i32 %N, 16 %factor.op.mul114 = shl i32 %M, 4 %cmp115 = icmp sgt i32 %M, 15 %cmp496 = icmp sgt i32 %N, 15 %mul15 = shl nsw i64 0, 2 %conv23 = sext i32 %N to i64 %mul24 = shl nsw i64 %conv23, 2 %wide.trip.count158 = zext nneg i32 %div to i64 %wide.trip.count153 = zext nneg i32 %div1 to i64 %wide.trip.count146 = zext nneg i32 0 to i64 %0 = add nsw i64 %wide.trip.count146, -1 %xtraiter163 = and i64 %wide.trip.count146, 3 %1 = icmp ult i64 %0, 3 %unroll_iter167 = and i64 %wide.trip.count146, 134217724 %lcmp.mod165.not = icmp eq i64 %xtraiter163, 0 br label %for.cond3.preheader.us.us for.cond3.preheader.us.us: ; preds = %for.cond3.for.cond.cleanup5_crit_edge.split.us.us.us, %entry %indvars.iv155 = phi i64 [ 0, %entry ], [ %indvars.iv.next156, %for.cond3.for.cond.cleanup5_crit_edge.split.us.us.us ] %2 = trunc nuw nsw i64 %indvars.iv155 to i32 %factor.op.mul95.us.us = mul i32 %factor.op.mul114, %2 %factor.op.mul.us.us = mul i32 0, %2 %idx.ext.us.us = sext i32 %factor.op.mul.us.us to i64 %idx.ext28.us.us = sext i32 %factor.op.mul95.us.us to i64 %add.ptr29.us.us = getelementptr inbounds i32, ptr %C_mem, i64 %idx.ext28.us.us br label %for.body6.us.us.us for.body6.us.us.us: ; preds = %for.cond7.for.cond.cleanup9_crit_edge.us.us.us, %for.cond3.preheader.us.us %indvars.iv148 = phi i64 [ %indvars.iv.next149, %for.cond7.for.cond.cleanup9_crit_edge.us.us.us ], [ 0, %for.cond3.preheader.us.us ] %3 = tail call x86_amx @llvm.x86.tilezero.internal(i16 16, i16 64) %4 = tail call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %3) %5 = shl nsw i64 %indvars.iv148, 4 %invariant.gep.us.us.us = getelementptr i32, ptr %B_mem, i64 %5 br i1 %lcmp.mod165.not, label %for.cond7.for.cond.cleanup9_crit_edge.us.us.us, label %for.body10.us.us.us.epil for.body10.us.us.us.epil: ; preds = %for.body6.us.us.us %6 = shl nsw i64 0, 4 %add.ptr14.us.us.us.epil = getelementptr inbounds i32, ptr null, i64 %6 %7 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr %add.ptr14.us.us.us.epil, i64 %mul15) %8 = tail call noundef <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %7) %9 = mul nuw nsw i64 %6, %conv23 %gep.us.us.us.epil = getelementptr i32, ptr %invariant.gep.us.us.us, i64 %9 %10 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr %gep.us.us.us.epil, i64 %mul24) %11 = tail call noundef <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %10) %12 = tail call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %4) %13 = tail call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %8) %14 = tail call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %11) %15 = tail call x86_amx @llvm.x86.tdpbf16ps.internal(i16 16, i16 64, i16 64, x86_amx %12, x86_amx %13, x86_amx %14) %16 = tail call noundef <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %15) %indvars.iv.next142.epil = add nuw nsw i64 0, 1 %epil.iter164.next = add i64 0, 1 %epil.iter164.cmp.not = icmp eq i64 %epil.iter164.next, %xtraiter163 br label %for.cond7.for.cond.cleanup9_crit_edge.us.us.us for.cond7.for.cond.cleanup9_crit_edge.us.us.us: ; preds = %for.body10.us.us.us.epil, %for.body6.us.us.us %.lcssa = phi <256 x i32> [ undef, %for.body6.us.us.us ], [ %16, %for.body10.us.us.us.epil ] %add.ptr32.us.us.us = getelementptr inbounds i32, ptr %add.ptr29.us.us, i64 %5 %17 = tail call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %.lcssa) tail call void @llvm.x86.tilestored64.internal(i16 16, i16 64, ptr %add.ptr32.us.us.us, i64 %mul24, x86_amx %17) %indvars.iv.next149 = add nuw nsw i64 %indvars.iv148, 1 %exitcond154.not = icmp eq i64 %indvars.iv.next149, %wide.trip.count153 br i1 %exitcond154.not, label %for.cond3.for.cond.cleanup5_crit_edge.split.us.us.us, label %for.body6.us.us.us for.cond3.for.cond.cleanup5_crit_edge.split.us.us.us: ; preds = %for.cond7.for.cond.cleanup9_crit_edge.us.us.us %indvars.iv.next156 = add nuw nsw i64 %indvars.iv155, 1 %exitcond159.not = icmp eq i64 %indvars.iv.next156, %wide.trip.count158 br label %for.cond3.preheader.us.us } ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare float @llvm.fmuladd.f32(float, float, float) #3 ; Function Attrs: nounwind declare x86_amx @llvm.x86.tilezero.internal(i16, i16) #4 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) declare <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx) #5 ; Function Attrs: nounwind declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64) #4 ; Function Attrs: nounwind declare x86_amx @llvm.x86.tdpbf16ps.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx) #4 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) declare x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32>) #5 ; Function Attrs: nounwind declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx) #4 ; uselistorder directives uselistorder ptr @llvm.x86.cast.tile.to.vector.v256i32, { 3, 2, 1, 0 } uselistorder ptr @llvm.x86.tileloadd64.internal, { 1, 0 } uselistorder ptr @llvm.x86.cast.vector.to.tile.v256i32, { 3, 2, 1, 0 } attributes #0 = { mustprogress noinline nounwind ssp uwtable "frame-pointer"="all" "min-legal-vector-width"="8192" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sapphirerapids" "target-features"="+adx,+aes,+amx-bf16,+amx-int8,+amx-tile,+avx,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+avxvnni,+bmi,+bmi2,+cldemote,+clflushopt,+clwb,+cmov,+crc32,+cx16,+cx8,+enqcmd,+evex512,+f16c,+fma,+fsgsbase,+fxsr,+gfni,+invpcid,+lzcnt,+mmx,+movbe,+movdir64b,+movdiri,+pclmul,+pconfig,+pku,+popcnt,+prfchw,+ptwrite,+rdpid,+rdrnd,+rdseed,+sahf,+serialize,+sgx,+sha,+shstk,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+tsxldtrk,+uintr,+vaes,+vpclmulqdq,+waitpkg,+wbnoinvd,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" } attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #4 = { nounwind } attributes #5 = { nocallback nofree nosync nounwind willreturn memory(none) }
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